Reliability/Failure Analysis Engineer

Type (Full-time, part-time etc.): Full-time

Reports To: Sr Director of Quality and Reliability

Location: San Diego

About Us:

Silanna Semiconductor is a privately held semiconductor company that develops disruptive technologies and products that address market needs in high efficiency power conversion. The company provides DC/DC and AC/DC integrated circuits that deliver Best-in-Class Efficiency so that its customers can build end products with Breakthrough Power Density. Silanna has a global footprint with design centers and satellite offices in North America, Europe, Asia, and Australia and is an ISO 9001 certified company.

About the Role:

• Primary job responsibility: Define and execute product qualification and perform failure analysis for test rejects.
• Define qualification plan
• Work with both internal and external team on product qualification execution, including qualification hardware development and validation, qualification process monitoring, data analysis and material disposition.
• Debug issues occur in both qualification hardware and devices.
• Utilize bench characterization to validate ATE test failure mode
• Perform both electrical and physical failure analysis to localize fault and detect failure mechanism.
• Perform data analysis and calculate reliability index, like product life time estimation and failure rate estimation.
• Interpret JEDEC standard and apply in Silanna product qualification strategy with consideration of schedule, cost and resource constraint.
• Ongoing Reliability Monitoring (ORM) activities and generate ORM reports.

About You:

• BSEE or equivalent. 5+ years working experience in Semiconductor industry product reliability and failure analysis.
• Basic knowledge of semiconductor physics, IC packaging and Quality / Reliability assurance.
• Experience with reliability HW setups and equipment for HTOL, HAST, THB, ESD, Latch-Up, etc.
• Experience working with Scanning electron microscopes, Focus Ion Beam, CT X-ray, CSAM, and optical microscopes, Ion Milling, Plasma decapsulation, electronic bench testing, system level testing
• Understanding of power topologies such as buck, boost, buck-boost, charge pumps, LDOs.
• Statistical analysis knowledge to assess reliability risk on abnormal materials at suppliers and at customer end.
• Knowledge of board level considerations, including component selection, PCB layout, packaging technologies and thermal analysis.
• Experience applying JEDEC quality related standards, and the science behind them.
• Experience with semiconductor fail modes of packaging technologies and fail mechanisms with respect to reliability.
• Good communication skills.